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# Created by write_sdc on Mon Jul 11 09:38:58 2022

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set sdc_version 2.0

set_units -time ns -resistance kOhm -capacitance pF -voltage V -current mA
set_wire_load_mode top
set_wire_load_model -name tsmc090_wl10 -library fast
set_driving_cell -min -lib_cell NAND2BX1 -pin Y [get_ports clk]
set_driving_cell -min -lib_cell NAND2BX1 -pin Y [get_ports rst_n]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports in_valid]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[127]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[126]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[125]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[124]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[123]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[122]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[121]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[120]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[119]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[118]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[117]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[116]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[115]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[114]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[113]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[112]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[111]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[110]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[109]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[108]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[107]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[106]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[105]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[104]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[103]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[102]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[101]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[100]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[99]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[98]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[97]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[96]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[95]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[94]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[93]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[92]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[91]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[90]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[89]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[88]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[87]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[86]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[85]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[84]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[83]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[82]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[81]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[80]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[79]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[78]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[77]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[76]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[75]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[74]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[73]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[72]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[71]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[70]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[69]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[68]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[67]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[66]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[65]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[64]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[63]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[62]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[61]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[60]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[59]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[58]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[57]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[56]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[55]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[54]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[53]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[52]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[51]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[50]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[49]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[48]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[47]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[46]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[45]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[44]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[43]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[42]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[41]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[40]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[39]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[38]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[37]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[36]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[35]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[34]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[33]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[32]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[31]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[30]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[29]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[28]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[27]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[26]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[25]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[24]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[23]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[22]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[21]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[20]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[19]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[18]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[17]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[16]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[15]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[14]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[13]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[12]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[11]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[10]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[9]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[8]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[7]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[6]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[5]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[4]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[3]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[2]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[1]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports {in_data[0]}]
set_driving_cell -lib_cell NAND2BX1 -pin Y [get_ports out_ready]
set_load -pin_load 0.001103 [get_ports in_ready]
set_load -pin_load 0.001103 [get_ports out_valid]
set_load -pin_load 0.001103 [get_ports {out_data[127]}]
set_load -pin_load 0.001103 [get_ports {out_data[126]}]
set_load -pin_load 0.001103 [get_ports {out_data[125]}]
set_load -pin_load 0.001103 [get_ports {out_data[124]}]
set_load -pin_load 0.001103 [get_ports {out_data[123]}]
set_load -pin_load 0.001103 [get_ports {out_data[122]}]
set_load -pin_load 0.001103 [get_ports {out_data[121]}]
set_load -pin_load 0.001103 [get_ports {out_data[120]}]
set_load -pin_load 0.001103 [get_ports {out_data[119]}]
set_load -pin_load 0.001103 [get_ports {out_data[118]}]
set_load -pin_load 0.001103 [get_ports {out_data[117]}]
set_load -pin_load 0.001103 [get_ports {out_data[116]}]
set_load -pin_load 0.001103 [get_ports {out_data[115]}]
set_load -pin_load 0.001103 [get_ports {out_data[114]}]
set_load -pin_load 0.001103 [get_ports {out_data[113]}]
set_load -pin_load 0.001103 [get_ports {out_data[112]}]
set_load -pin_load 0.001103 [get_ports {out_data[111]}]
set_load -pin_load 0.001103 [get_ports {out_data[110]}]
set_load -pin_load 0.001103 [get_ports {out_data[109]}]
set_load -pin_load 0.001103 [get_ports {out_data[108]}]
set_load -pin_load 0.001103 [get_ports {out_data[107]}]
set_load -pin_load 0.001103 [get_ports {out_data[106]}]
set_load -pin_load 0.001103 [get_ports {out_data[105]}]
set_load -pin_load 0.001103 [get_ports {out_data[104]}]
set_load -pin_load 0.001103 [get_ports {out_data[103]}]
set_load -pin_load 0.001103 [get_ports {out_data[102]}]
set_load -pin_load 0.001103 [get_ports {out_data[101]}]
set_load -pin_load 0.001103 [get_ports {out_data[100]}]
set_load -pin_load 0.001103 [get_ports {out_data[99]}]
set_load -pin_load 0.001103 [get_ports {out_data[98]}]
set_load -pin_load 0.001103 [get_ports {out_data[97]}]
set_load -pin_load 0.001103 [get_ports {out_data[96]}]
set_load -pin_load 0.001103 [get_ports {out_data[95]}]
set_load -pin_load 0.001103 [get_ports {out_data[94]}]
set_load -pin_load 0.001103 [get_ports {out_data[93]}]
set_load -pin_load 0.001103 [get_ports {out_data[92]}]
set_load -pin_load 0.001103 [get_ports {out_data[91]}]
set_load -pin_load 0.001103 [get_ports {out_data[90]}]
set_load -pin_load 0.001103 [get_ports {out_data[89]}]
set_load -pin_load 0.001103 [get_ports {out_data[88]}]
set_load -pin_load 0.001103 [get_ports {out_data[87]}]
set_load -pin_load 0.001103 [get_ports {out_data[86]}]
set_load -pin_load 0.001103 [get_ports {out_data[85]}]
set_load -pin_load 0.001103 [get_ports {out_data[84]}]
set_load -pin_load 0.001103 [get_ports {out_data[83]}]
set_load -pin_load 0.001103 [get_ports {out_data[82]}]
set_load -pin_load 0.001103 [get_ports {out_data[81]}]
set_load -pin_load 0.001103 [get_ports {out_data[80]}]
set_load -pin_load 0.001103 [get_ports {out_data[79]}]
set_load -pin_load 0.001103 [get_ports {out_data[78]}]
set_load -pin_load 0.001103 [get_ports {out_data[77]}]
set_load -pin_load 0.001103 [get_ports {out_data[76]}]
set_load -pin_load 0.001103 [get_ports {out_data[75]}]
set_load -pin_load 0.001103 [get_ports {out_data[74]}]
set_load -pin_load 0.001103 [get_ports {out_data[73]}]
set_load -pin_load 0.001103 [get_ports {out_data[72]}]
set_load -pin_load 0.001103 [get_ports {out_data[71]}]
set_load -pin_load 0.001103 [get_ports {out_data[70]}]
set_load -pin_load 0.001103 [get_ports {out_data[69]}]
set_load -pin_load 0.001103 [get_ports {out_data[68]}]
set_load -pin_load 0.001103 [get_ports {out_data[67]}]
set_load -pin_load 0.001103 [get_ports {out_data[66]}]
set_load -pin_load 0.001103 [get_ports {out_data[65]}]
set_load -pin_load 0.001103 [get_ports {out_data[64]}]
set_load -pin_load 0.001103 [get_ports {out_data[63]}]
set_load -pin_load 0.001103 [get_ports {out_data[62]}]
set_load -pin_load 0.001103 [get_ports {out_data[61]}]
set_load -pin_load 0.001103 [get_ports {out_data[60]}]
set_load -pin_load 0.001103 [get_ports {out_data[59]}]
set_load -pin_load 0.001103 [get_ports {out_data[58]}]
set_load -pin_load 0.001103 [get_ports {out_data[57]}]
set_load -pin_load 0.001103 [get_ports {out_data[56]}]
set_load -pin_load 0.001103 [get_ports {out_data[55]}]
set_load -pin_load 0.001103 [get_ports {out_data[54]}]
set_load -pin_load 0.001103 [get_ports {out_data[53]}]
set_load -pin_load 0.001103 [get_ports {out_data[52]}]
set_load -pin_load 0.001103 [get_ports {out_data[51]}]
set_load -pin_load 0.001103 [get_ports {out_data[50]}]
set_load -pin_load 0.001103 [get_ports {out_data[49]}]
set_load -pin_load 0.001103 [get_ports {out_data[48]}]
set_load -pin_load 0.001103 [get_ports {out_data[47]}]
set_load -pin_load 0.001103 [get_ports {out_data[46]}]
set_load -pin_load 0.001103 [get_ports {out_data[45]}]
set_load -pin_load 0.001103 [get_ports {out_data[44]}]
set_load -pin_load 0.001103 [get_ports {out_data[43]}]
set_load -pin_load 0.001103 [get_ports {out_data[42]}]
set_load -pin_load 0.001103 [get_ports {out_data[41]}]
set_load -pin_load 0.001103 [get_ports {out_data[40]}]
set_load -pin_load 0.001103 [get_ports {out_data[39]}]
set_load -pin_load 0.001103 [get_ports {out_data[38]}]
set_load -pin_load 0.001103 [get_ports {out_data[37]}]
set_load -pin_load 0.001103 [get_ports {out_data[36]}]
set_load -pin_load 0.001103 [get_ports {out_data[35]}]
set_load -pin_load 0.001103 [get_ports {out_data[34]}]
set_load -pin_load 0.001103 [get_ports {out_data[33]}]
set_load -pin_load 0.001103 [get_ports {out_data[32]}]
set_load -pin_load 0.001103 [get_ports {out_data[31]}]
set_load -pin_load 0.001103 [get_ports {out_data[30]}]
set_load -pin_load 0.001103 [get_ports {out_data[29]}]
set_load -pin_load 0.001103 [get_ports {out_data[28]}]
set_load -pin_load 0.001103 [get_ports {out_data[27]}]
set_load -pin_load 0.001103 [get_ports {out_data[26]}]
set_load -pin_load 0.001103 [get_ports {out_data[25]}]
set_load -pin_load 0.001103 [get_ports {out_data[24]}]
set_load -pin_load 0.001103 [get_ports {out_data[23]}]
set_load -pin_load 0.001103 [get_ports {out_data[22]}]
set_load -pin_load 0.001103 [get_ports {out_data[21]}]
set_load -pin_load 0.001103 [get_ports {out_data[20]}]
set_load -pin_load 0.001103 [get_ports {out_data[19]}]
set_load -pin_load 0.001103 [get_ports {out_data[18]}]
set_load -pin_load 0.001103 [get_ports {out_data[17]}]
set_load -pin_load 0.001103 [get_ports {out_data[16]}]
set_load -pin_load 0.001103 [get_ports {out_data[15]}]
set_load -pin_load 0.001103 [get_ports {out_data[14]}]
set_load -pin_load 0.001103 [get_ports {out_data[13]}]
set_load -pin_load 0.001103 [get_ports {out_data[12]}]
set_load -pin_load 0.001103 [get_ports {out_data[11]}]
set_load -pin_load 0.001103 [get_ports {out_data[10]}]
set_load -pin_load 0.001103 [get_ports {out_data[9]}]
set_load -pin_load 0.001103 [get_ports {out_data[8]}]
set_load -pin_load 0.001103 [get_ports {out_data[7]}]
set_load -pin_load 0.001103 [get_ports {out_data[6]}]
set_load -pin_load 0.001103 [get_ports {out_data[5]}]
set_load -pin_load 0.001103 [get_ports {out_data[4]}]
set_load -pin_load 0.001103 [get_ports {out_data[3]}]
set_load -pin_load 0.001103 [get_ports {out_data[2]}]
set_load -pin_load 0.001103 [get_ports {out_data[1]}]
set_load -pin_load 0.001103 [get_ports {out_data[0]}]
set_ideal_network [get_ports rst_n]
create_clock [get_ports clk]  -period 1  -waveform {0 0.5}
set_clock_latency 0  [get_clocks clk]
set_clock_uncertainty -setup 0  [get_clocks clk]
set_input_delay -clock clk  0.5  [get_ports rst_n]
set_input_delay -clock clk  0.5  [get_ports in_valid]
set_input_delay -clock clk  0.5  [get_ports {in_data[127]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[126]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[125]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[124]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[123]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[122]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[121]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[120]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[119]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[118]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[117]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[116]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[115]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[114]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[113]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[112]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[111]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[110]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[109]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[108]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[107]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[106]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[105]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[104]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[103]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[102]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[101]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[100]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[99]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[98]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[97]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[96]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[95]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[94]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[93]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[92]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[91]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[90]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[89]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[88]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[87]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[86]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[85]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[84]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[83]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[82]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[81]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[80]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[79]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[78]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[77]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[76]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[75]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[74]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[73]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[72]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[71]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[70]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[69]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[68]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[67]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[66]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[65]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[64]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[63]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[62]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[61]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[60]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[59]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[58]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[57]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[56]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[55]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[54]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[53]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[52]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[51]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[50]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[49]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[48]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[47]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[46]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[45]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[44]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[43]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[42]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[41]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[40]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[39]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[38]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[37]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[36]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[35]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[34]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[33]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[32]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[31]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[30]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[29]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[28]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[27]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[26]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[25]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[24]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[23]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[22]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[21]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[20]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[19]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[18]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[17]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[16]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[15]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[14]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[13]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[12]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[11]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[10]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[9]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[8]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[7]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[6]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[5]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[4]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[3]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[2]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[1]}]
set_input_delay -clock clk  0.5  [get_ports {in_data[0]}]
set_input_delay -clock clk  0.5  [get_ports out_ready]
set_output_delay -clock clk  0  [get_ports in_ready]
set_output_delay -clock clk  0  [get_ports out_valid]
set_output_delay -clock clk  0  [get_ports {out_data[127]}]
set_output_delay -clock clk  0  [get_ports {out_data[126]}]
set_output_delay -clock clk  0  [get_ports {out_data[125]}]
set_output_delay -clock clk  0  [get_ports {out_data[124]}]
set_output_delay -clock clk  0  [get_ports {out_data[123]}]
set_output_delay -clock clk  0  [get_ports {out_data[122]}]
set_output_delay -clock clk  0  [get_ports {out_data[121]}]
set_output_delay -clock clk  0  [get_ports {out_data[120]}]
set_output_delay -clock clk  0  [get_ports {out_data[119]}]
set_output_delay -clock clk  0  [get_ports {out_data[118]}]
set_output_delay -clock clk  0  [get_ports {out_data[117]}]
set_output_delay -clock clk  0  [get_ports {out_data[116]}]
set_output_delay -clock clk  0  [get_ports {out_data[115]}]
set_output_delay -clock clk  0  [get_ports {out_data[114]}]
set_output_delay -clock clk  0  [get_ports {out_data[113]}]
set_output_delay -clock clk  0  [get_ports {out_data[112]}]
set_output_delay -clock clk  0  [get_ports {out_data[111]}]
set_output_delay -clock clk  0  [get_ports {out_data[110]}]
set_output_delay -clock clk  0  [get_ports {out_data[109]}]
set_output_delay -clock clk  0  [get_ports {out_data[108]}]
set_output_delay -clock clk  0  [get_ports {out_data[107]}]
set_output_delay -clock clk  0  [get_ports {out_data[106]}]
set_output_delay -clock clk  0  [get_ports {out_data[105]}]
set_output_delay -clock clk  0  [get_ports {out_data[104]}]
set_output_delay -clock clk  0  [get_ports {out_data[103]}]
set_output_delay -clock clk  0  [get_ports {out_data[102]}]
set_output_delay -clock clk  0  [get_ports {out_data[101]}]
set_output_delay -clock clk  0  [get_ports {out_data[100]}]
set_output_delay -clock clk  0  [get_ports {out_data[99]}]
set_output_delay -clock clk  0  [get_ports {out_data[98]}]
set_output_delay -clock clk  0  [get_ports {out_data[97]}]
set_output_delay -clock clk  0  [get_ports {out_data[96]}]
set_output_delay -clock clk  0  [get_ports {out_data[95]}]
set_output_delay -clock clk  0  [get_ports {out_data[94]}]
set_output_delay -clock clk  0  [get_ports {out_data[93]}]
set_output_delay -clock clk  0  [get_ports {out_data[92]}]
set_output_delay -clock clk  0  [get_ports {out_data[91]}]
set_output_delay -clock clk  0  [get_ports {out_data[90]}]
set_output_delay -clock clk  0  [get_ports {out_data[89]}]
set_output_delay -clock clk  0  [get_ports {out_data[88]}]
set_output_delay -clock clk  0  [get_ports {out_data[87]}]
set_output_delay -clock clk  0  [get_ports {out_data[86]}]
set_output_delay -clock clk  0  [get_ports {out_data[85]}]
set_output_delay -clock clk  0  [get_ports {out_data[84]}]
set_output_delay -clock clk  0  [get_ports {out_data[83]}]
set_output_delay -clock clk  0  [get_ports {out_data[82]}]
set_output_delay -clock clk  0  [get_ports {out_data[81]}]
set_output_delay -clock clk  0  [get_ports {out_data[80]}]
set_output_delay -clock clk  0  [get_ports {out_data[79]}]
set_output_delay -clock clk  0  [get_ports {out_data[78]}]
set_output_delay -clock clk  0  [get_ports {out_data[77]}]
set_output_delay -clock clk  0  [get_ports {out_data[76]}]
set_output_delay -clock clk  0  [get_ports {out_data[75]}]
set_output_delay -clock clk  0  [get_ports {out_data[74]}]
set_output_delay -clock clk  0  [get_ports {out_data[73]}]
set_output_delay -clock clk  0  [get_ports {out_data[72]}]
set_output_delay -clock clk  0  [get_ports {out_data[71]}]
set_output_delay -clock clk  0  [get_ports {out_data[70]}]
set_output_delay -clock clk  0  [get_ports {out_data[69]}]
set_output_delay -clock clk  0  [get_ports {out_data[68]}]
set_output_delay -clock clk  0  [get_ports {out_data[67]}]
set_output_delay -clock clk  0  [get_ports {out_data[66]}]
set_output_delay -clock clk  0  [get_ports {out_data[65]}]
set_output_delay -clock clk  0  [get_ports {out_data[64]}]
set_output_delay -clock clk  0  [get_ports {out_data[63]}]
set_output_delay -clock clk  0  [get_ports {out_data[62]}]
set_output_delay -clock clk  0  [get_ports {out_data[61]}]
set_output_delay -clock clk  0  [get_ports {out_data[60]}]
set_output_delay -clock clk  0  [get_ports {out_data[59]}]
set_output_delay -clock clk  0  [get_ports {out_data[58]}]
set_output_delay -clock clk  0  [get_ports {out_data[57]}]
set_output_delay -clock clk  0  [get_ports {out_data[56]}]
set_output_delay -clock clk  0  [get_ports {out_data[55]}]
set_output_delay -clock clk  0  [get_ports {out_data[54]}]
set_output_delay -clock clk  0  [get_ports {out_data[53]}]
set_output_delay -clock clk  0  [get_ports {out_data[52]}]
set_output_delay -clock clk  0  [get_ports {out_data[51]}]
set_output_delay -clock clk  0  [get_ports {out_data[50]}]
set_output_delay -clock clk  0  [get_ports {out_data[49]}]
set_output_delay -clock clk  0  [get_ports {out_data[48]}]
set_output_delay -clock clk  0  [get_ports {out_data[47]}]
set_output_delay -clock clk  0  [get_ports {out_data[46]}]
set_output_delay -clock clk  0  [get_ports {out_data[45]}]
set_output_delay -clock clk  0  [get_ports {out_data[44]}]
set_output_delay -clock clk  0  [get_ports {out_data[43]}]
set_output_delay -clock clk  0  [get_ports {out_data[42]}]
set_output_delay -clock clk  0  [get_ports {out_data[41]}]
set_output_delay -clock clk  0  [get_ports {out_data[40]}]
set_output_delay -clock clk  0  [get_ports {out_data[39]}]
set_output_delay -clock clk  0  [get_ports {out_data[38]}]
set_output_delay -clock clk  0  [get_ports {out_data[37]}]
set_output_delay -clock clk  0  [get_ports {out_data[36]}]
set_output_delay -clock clk  0  [get_ports {out_data[35]}]
set_output_delay -clock clk  0  [get_ports {out_data[34]}]
set_output_delay -clock clk  0  [get_ports {out_data[33]}]
set_output_delay -clock clk  0  [get_ports {out_data[32]}]
set_output_delay -clock clk  0  [get_ports {out_data[31]}]
set_output_delay -clock clk  0  [get_ports {out_data[30]}]
set_output_delay -clock clk  0  [get_ports {out_data[29]}]
set_output_delay -clock clk  0  [get_ports {out_data[28]}]
set_output_delay -clock clk  0  [get_ports {out_data[27]}]
set_output_delay -clock clk  0  [get_ports {out_data[26]}]
set_output_delay -clock clk  0  [get_ports {out_data[25]}]
set_output_delay -clock clk  0  [get_ports {out_data[24]}]
set_output_delay -clock clk  0  [get_ports {out_data[23]}]
set_output_delay -clock clk  0  [get_ports {out_data[22]}]
set_output_delay -clock clk  0  [get_ports {out_data[21]}]
set_output_delay -clock clk  0  [get_ports {out_data[20]}]
set_output_delay -clock clk  0  [get_ports {out_data[19]}]
set_output_delay -clock clk  0  [get_ports {out_data[18]}]
set_output_delay -clock clk  0  [get_ports {out_data[17]}]
set_output_delay -clock clk  0  [get_ports {out_data[16]}]
set_output_delay -clock clk  0  [get_ports {out_data[15]}]
set_output_delay -clock clk  0  [get_ports {out_data[14]}]
set_output_delay -clock clk  0  [get_ports {out_data[13]}]
set_output_delay -clock clk  0  [get_ports {out_data[12]}]
set_output_delay -clock clk  0  [get_ports {out_data[11]}]
set_output_delay -clock clk  0  [get_ports {out_data[10]}]
set_output_delay -clock clk  0  [get_ports {out_data[9]}]
set_output_delay -clock clk  0  [get_ports {out_data[8]}]
set_output_delay -clock clk  0  [get_ports {out_data[7]}]
set_output_delay -clock clk  0  [get_ports {out_data[6]}]
set_output_delay -clock clk  0  [get_ports {out_data[5]}]
set_output_delay -clock clk  0  [get_ports {out_data[4]}]
set_output_delay -clock clk  0  [get_ports {out_data[3]}]
set_output_delay -clock clk  0  [get_ports {out_data[2]}]
set_output_delay -clock clk  0  [get_ports {out_data[1]}]
set_output_delay -clock clk  0  [get_ports {out_data[0]}]
